HW/SW Co-Design Note

Synthesis 合成  Allocation + Binding + Scheduling

排程(scheduling)、連結(binding)、與分配(allocation)
                          (運算對資源的指定)    (貼標籤)

Problem : what is the goal? (計算)
Architecture : system arch. (表示component 與其連接)
Specification : Possible Mapping

partitioning - optimization
computation < --------------MAPPING--------------- > component

Bi-partitioning :     SW       +          HW
                         processor +       ASIC

Partitioning (Level of Abstraction)
functional - system level - system parameter unknown
structural - RTL level , netlist level

[Reference]
http://www.nioswiki.com/

http://ares.ee.ncu.edu.tw/wiki3/index.php/Digital_Circuit_Design_Automation